EPTC Program Highlights
3rd - 6th Dec 2019
First time ever the IEEE EPS Board Of Governors meeting is held outside USA. Many packaging experts who are members of BoG will be participating in the conference program.
Conference Banquet in S.E.A. Aquarium
Fine dining at a stunning and memorable backdrop with marine animals sighted through a panoramic window to the ocean.
Invited Presentations *Updated* Click Here
1. “Emerging NAND Memory Packaging Challenges”
Dr. Gokul Kumar
2.“Interface Pattern Void Analysis in Face to Face Hybrid Wafer Bonding”
Dr Soon-Wook Kim
3.“Basic considerations to define a proper frontend backend interaction for die bonding”
Ms Rozalia Beica
4. "Technology Trends for Large Area Panel Level Packaging”
5.“Thermal and Failure Analysis of Advanced Sub-Micron Devices Using Transient Thermoreflectance Thermography”
Prof. Andrew Tay
6.“Low temperature interconnect technology using Sn-Bi alloy system for high performance packages”
Mr Kei Murayama
7.“Packaging for Performance Scaling”
Mr Sam Karikalan , General Chair of ECTC 2018
Dr. Robert Kao
9.“Advanced Interconnect Material Solutions for 5G Market”
Dr. Yuan Yuan Zhou
10.“ESD, EOS and AMR”
Dr. Stevan Hunter
11. A Framework for Reliability Assessment of Chemical Induced Display Delamination
Dr. Kedar Hardika
12. Temporary Wafer Bonding Technology for Advanced Packaging
Dr. Dongshun Bai
13. Submicron Polymer Re-distribution Layer Technology for Advanced InFO Packaging
Dr. Han-Ping Pu
14. ESD, EOC and AMR
Dr Stevan Hunter
15. Effects of Ageing on the Reliability of Electronic Products Incorporating Lead Free Solders
Prof. Jeffrey C. Suhling
16. Package Level Systems Integration: A key to maintaining the pace of progress
17. Organic substrate material with low transmission loss and effective in suppressing package warpage for 5G application
Mr. Shunsuke Tonouchi
18. Engineering Green Electronics
Prof. David Mark Harvey
19. Novel Thin Wafer De-bonding system for 3D TSV Multi-chip Packaging of High Bandwidth Memory Devices
Dr. Min Woo Rhee, Daniel
and more... ....
Professional Development Courses (PDC) Instructors
Introduction to fan-out wafer-level packaging, Dr. Beth Keser – Intel Corporation, USA
Introduction to 3D interconnect and packaging technologies, Prof. Sarah Kim – Seoul National University of Science and Technology.
CONTINUING EDUCATION UNITS/PROFESSIONAL DEVELOPMENT HOUR
All Professional Development Courses (PDC) being presented at the 20th EPTC, in Singapore, have been approved to receive 0.35 Continuing Education Units (CEUs) or 3.5 Professional Development Hour (PDH). CEUs and PDH are recognized by employers for continuing professional development as a formal measure of participation and attendance in “non-credit” self-study courses, tutorials, symposia, and workshops. IEEE will issue a certificate in the attendee's name and the title of the PDC attended. Each attendee requesting this credit will need to complete a class survey form and a sign-in sheet requesting the credit. CEU/PDH records will be kept in a registry maintained by the IEEE Educational Activities Department in Piscataway, New Jersey. EPS will underwrite the cost of this service.
The IEEE has been approved as an Authorized Provider by the International Association for Continuing Education and Training (IACET). In obtaining this approval, the IEEE has demonstrated that it complies with the IACET Standards which are widely recognized as standards of good practice internationally. As a result of their Authorized Provider membership status, IEEE is authorized to offer IACET CEUs for its programs that qualify under the IACET Standards.