Packaging Education Workshop
Date/Time: Dec 8, 1:10pm
Venue: Veranda III
Chairs: Prof. Jeff Suhling and Prof. Andrew Tay
Electronics packaging is a wide-ranging, multi-disciplinary field. This is evidenced by the following list of Technical Committees associated with the Electronics Packaging Society: Materials & Processes; High Density Substrates & Boards; Electrical Design, Modeling & Simulation; Thermal & Mechanical; Emerging Technology; Nanotechnology; Power & Energy; RF & Thz Technologies; Photonics; 3D/TSV; Reliability; Test. With such a wide-ranging field, universities all over the world are facing a real challenge in designing an education program to prepare their graduates for this industry. Indeed, many universities don’t even try and simply stick to imparting the fundamentals of science and engineering to their students, leaving companies to provide further specialized training after they are employed by the companies. On the other hand, many companies would like universities to at least teach some specialization modules in electronics packaging. The main objective of this Workshop is to discover what some universities in Asia are doing in preparing their students to enter this industry. Much of electronics packaging is carried out in Asia. Are there any specialization programs on electronics packaging in Asian universities? What is the rationale behind them? How different are they from those in America and Europe?
1:10-1:20 – Welcome and Introduction: Prof. Andrew Tay
1:20-1:30 – Prof. K. N. Chiang, National Tsing Hua University, Taiwan. (Virtual)
1:30-1:40 – Prof. Wenhui Zhu, Central South University, China.
1:40-1:50 – Prof. Gu-Sung Kim, Kangnam University, South Korea.
1:50-2:00 – Prof. Chuan Seng Tan, Nanyang Technological University, Singapore
2:00-2:25 – Q&A and Wrap Up: Prof Jeff Suhling
Biographies of Speakers:
Prof. K. N. Chiang
Professor K. N. Chiang received his Ph.D. degree from the Georgia Institute of Technology, USA. Currently, he is the Chair Professor of the National Tsing Hua University in Hsinchu, Taiwan. From 2010 to 2013, he served as Director of the National High-Performance Computing Center, the National Strategic Research Center of Taiwan. He has received three outstanding research awards from the Ministry of Science and Technology of Taiwan and has published more than 400 technical papers in international journals and conference proceedings. He has obtained more than 50 EP-related patents. Currently, he is Editor-in-Chief of the Journal of Mechanics (SCI), Senior Area Editor of the IEEE Transactions on Component, Packaging and Manufacturing Technology (SCI), and academic editor of Materials (SCI). Professor Chiang is an IEEE / ASME / STAM Fellow and the Academician of the International Academy of Engineering.
Prof. Wenhui Zhu
Prof. Wenhui Zhu is a professor at Central South University, China, and Founder & Chairman of Changsha AMQ Intelligent Technology Pte Ltd. He was elected as a National Elite Talent of China and a Full member of the Russian Academy of Natural Sciences. Previously he was Chief Technology Officer of Tian Shui Hua Tian Technology Co. Ltd, CEO of Kun Shan Q Technology Limited Co. He was Chief Scientist of the 973 program on IC wafer level 3D integration, and has been working in TSV packaging, DFR (design for reliability), DFM (design for manufacturability) and DFP (design for performance), packaging materials and 3D nano-/micro-electronics packaging in leading semiconductor and packaging companies including Infineon and UTAC. Dr. Zhu chaired many key projects in advanced packaging and structural integration such as the national 863 project and state key technology projects and made great achievements in technology innovation and cost-saving. He has been invited to give keynote talks and short courses in international forums and conferences. Dr. Zhu has published more than 230 technical papers and won 8 times of best paper awards.
Prof. Gu-Sung Kim
Gu-Sung KIM (M: 2018, SM: 2016) is currently a professor at Kangnam University and a founder of EPRC (Electronic Package Research Center) and EPMS (Electronic-Package Mission Society). He has 30 years of experience in R&D of Semiconductor Packaging. Prior to joining and establishing his lecture/research position, Kim was a 3D IC/TSV/WLP project leader at Samsung Electronics Co., Ltd, IPT team, Memory Division for 17 years. He has more 130 patents as an inventor in Korea and USA related to 3D IC, TSV, and Interposer. He has published 2 semiconductor packaging handbooks and taught more than 3000 engineers in Korea. He has received several awards from Korea MOTIE government, Samsung, Alfred Marquis Lifetime, City May, and SEMI etc. Kim received a Ph.D. degree in materials engineering from Rensselaer Polytechnic Institute, Troy, NY, USA, and a BS degree in ceramic engineering from Yonsei University, Seoul, Korea. He has served as chair of IEEE EPS Korea Council, SEMI STS ESIP, several National R&D programs, vice-chair of KSDT, deputy-chair of EPRC, Kangnam University and Packaging Technology WG at KMEPS. He also has a position of BOD Chair of Electro-Package Mission Society (EPCross).
Prof. Chuan Seng Tan
Chuan Seng TAN (S’01-M’06-SM’19) is a Professor of Electronic Engineering at the School of Electrical and Electronic Engineering at Nanyang Technological University, Singapore. He received his PhD from MIT in 2006. Currently, he is working on process technology of three-dimensional integrated circuits (3D IC), as well as engineered substrate (Si/Ge/Sn) for group-IV photonics. He has numerous publications (journal and conference) and IPs on 3D technology and engineered substrates. Nine of his inventions have since been licensed to a spin-off company. He co-edited/co-authored five books on 3D packaging technology. He is a senior member of IEEE and a recipient of the Exceptional Technical Achievement Award from the IEEE Electronics Packaging Society (EPS) in 2019. Beginning June 2019, he is a Distinguished Lecturer with IEEE-EPS. He is a Fellow of the International Microelectronics Assembly and Packaging Society (IMAPS) since 2019 and a recipient of the William D. Ashman - John A. Wagnon Technical Achievement Award in 2020. He was the Chair of the Interconnections Sub-Committee for ECTC’2021. He was the General Chair of the 2020 IEEE Electronics Packaging Technology Conference (Virtual). In addition, he is an Associate Editor for the IEEE Transactions on Components, Packaging and Manufacturing Technology and was recognized with the Best Associate Editor Award in 2021.