Course #1: Fan-Out Packaging and Chiplet Heterogeneous Integration

John H Lau, Unimicron Technology Corporation

Abstract: Fan-out wafer/panel-level packaging has been getting lots of tractions since TSMC used their integrated fan-out to package the application processor chipset for the iPhone 7. In this lecture, the following topics will be presented and discussed. Emphasis is placed on the fundamentals and latest developments of these areas in the past few years. Their future trends will also be explored. Chiplet is a chip design method and heterogeneous integration (HI) is a chip packaging method. HI uses packaging technology to integrate dissimilar chips, photonic devices, and/or components (either side-by-side, stacked, or both) with different sizes and functions, and from different fabless design houses, foundries, wafer sizes, and feature sizes into a system or subsystem on a common package substrate. These chips can be any kind of devices and don’t have to be chiplets. On the other hand, for chiplets, they have to use the heterogeneous integration to package them. For the next few years, we will see more implementations of a higher level of chiplet designs and HI packaging, whether it is for time-to-market, performance, form factor, power consumption or cost. In this lecture, the introduction, recent advances, and trends in chiplet design and HI packaging will be presented.

Biography: John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging and SMT assembly, has published more than 515 peer-reviewed papers (out of which 375 are the principal investigator), 40 issued and pending US patents (out of which 25 are the principal inventor), and 23 textbooks (all are the first author). John is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow and has been actively participating to industry/academy/society meetings/conferences to learn, to share, and to contribute

Who Should Attend?

If you (students, engineers, and managers) are involved with any aspect of the electronics industry, you should attend this course. It is equally suited for R&D professionals and scientists. The lectures are based on the publications by many distinguish authors and the books (by the lecturer) such as Fan-Out Wafer-Level Packaging (Springer, 2018), Heterogeneous Integration (Springer, 2019), and Semiconductor Advanced Packaging (Springer, 2021). Each attendee will receive more than 300 pages of lecture notes.

Course #2: Advanced Packaging for MEMS and Sensors

Horst Theuss, Infineon Technologies

Abstract: Sensors are everywhere! They create data and provide the “food” for the Internet of Things (IoT).  This course provides an overview on package approaches for MEMS- and sensor devices. Starting from standard semiconductor packaging, MEMS- and sensor specific challenges will be worked out. Case studies will make up a large part of the PDC, covering advanced packaging, such as Fan Out Wafer Level Packaging (FOWLP) but also mature leadframe and substrate-based concepts.

The discussion of MEMS packaging accounts for the major part of the course. MEMS involve mechanically movable or oscillating parts creating the need for cavity packaging. Various concepts for cavity packages will be discussed followed by an elaboration on package induced stress and its impact to MEMS performance. Case studies on pressure sensors and microphones include elaborations on package induced mechanical stress and its implications on device performance. This includes a discussion on package materials, their properties and function in the device. Within a short side trip we will evaluate options to assemble a MEMS-microphone chip into a FOWLP. Robustness requirements and approaches for risk mitigation in harsh environments represent a further topic of the PDC’s MEMS section.

A further section in the course covers RF-packaging for GHz applications making use of FOWLP. The discussion will include the capability of FOWLP with respect to RF-specific layouts but also briefly dig into concepts with antennas integrated into the package. Magnetic sensors and their implications to packaging represent the last application-specific section of the PDC.

The summary is intended to lead into a roadmap discussion about the future of MEMS and sensor packaging. Will the focus be on SiP (System in Package) or SoC (System on Chip)? What will be the future requirements before the background of IoT, heterogeneous integration and advanced packaging activities?

Biography: Horst Theuss received his Ph.D. degree in Physics from the University of Stuttgart in 1993. His research was awarded a “Otto Hahn Medal for young scientists” by the Max Planck Society. As a research staff member at the Max Planck Institute for Metal Research he concentrated on magnetic properties of superconductors and amorphous materials. Within a one-year assignment at the IBM Almaden Research Center in San Jose, CA, he worked on magneto-optical properties of exchange-coupled thin layers. In 1996, he started his industrial career at Vacuumschmelze GmbH, Hanau/Germany as a product marketing manager for alloys with special magnetic properties. Horst Theuss joined Infineon Technologies, Regensburg/Germany in 2000. Since then he has been developing package concepts and processes in the fields of discrete semiconductors, wafer level packaging, cavity packaging, materials and integration. As a Senior Principal he is today responsible for predevelopments with a focus on MEMS and Sensors. Horst Theuss holds approximately 100 patents. As author and co-editor he has contributed to numerous scientific papers, conferences and books.

Who Should Attend?

The course is intended for engineers and students, who would like to broaden their view on MEMS and sensor packaging, but also to dig somewhat deeper into specific topics. It will also be useful for technical managers working in the field, who would like to get a picture on the packaging landscape and the specific needs for sensors and MEMS. 

Course #3: Reliability Engineering Testing Methodology and Statistical Knowledge for Qualifications of Consumer and Automotive Electronic Components

Fen Chen , Cruise LLC (a GM company)

Abstract: The consumer electronics industry and today’s fast-growing automotive industry continue to demand ever-higher product hardware reliability. This tutorial will provide an overview of reliability testing methodology and statistical knowledge for qualifications of consumers and automotive electronic components. The reliability testing management includes various Rel testing methods and their application to product development at different phases will be first introduced. Some important statistic/probabilistic concepts including uncertainty, confidence level, and how to minimize/deal with them will be discussed. An effective approach to mitigate low sample size and short test duration will be introduced. Then the tutorial will focus on the physics of failure-based acceleration life models for some common reliability testing failures. A deep dive discussion on the temperature cycling model considering dT acceleration, dwell time acceleration, ramp rate acceleration, and Tmax acceleration will be explored. Next, a typical methodology to develop a PoF-based Rel validation testing plan reference to the product field mission profile will be introduced. The mission profiles of conventional vehicles and consumer smartphones will be compared. How to develop a customized mission profile for an autonomous vehicle specifically per its deployment location will be described. Finally, some examples of hardware failure modes with their risk assessments and lifetime modeling will be presented.

Biography: Fen Chen received his Ph.D. degree in Electrical Engineering in 1998 from the University of Delaware. From 1997 to 1998, he was with Intel Component Research in Santa Clara, CA as a graduate intern working on IC interconnect reliability. He joined IBM microelectronics at Essex Junction, VT in 1998 and had worked on semiconductor technology reliability issues until 2015. From 2015 to 2019, he worked for Apple Inc at Cupertino, CA as a senior reliability engineer focusing on the qualifications of various consumer electronic products. In 2019, he joined Lumileds in San Jose, CA as the director of quality and reliability and was responsible for qualifying novel µLED MCM products for automotive applications. After 6-month of work at Lumileds, he joined GM Cruise in 2019 as a senior staff reliability/validation engineer and has been working on validations of electronic, optical, and electromechanical modules for groundbreaking Cruise AV hardware systems since then. He holds more than fifty-five patents and has published over 60 technical papers/invited talks in various journals and conference proceedings.

Who Should Attend?

Engineers and tech managers already involved in the consumer product and automotive  product fields, and those who need a fundamental understanding or a broad overview of the product reliability qualification.

Course #4: Photonic Technologies for Communication, Sensing, and Displays

Torsten Wipiejewski, Huawei Technologies

Course Objective:

This course will provide an overview on the various photonic technologies that enable optical communication, optical sensing, and modern display applications. These applications are key for the information and communication technology of today and path a way to the future. High speed optical communication from board level in data centers to long haul transmission requires photonic components with high speed and high reliability. We will discuss the main components such as laser diodes of various types, high speed optical modulators and photodetectors as well as integration schemes such as photonic integrated circuits PICs and packaging aspects. Photonic technologies are also widely used as sensors for various applications including health monitoring. One key advantage is the potential for non-invasive measurements that facilitates the usage by end-users without specific medical knowledge. Packaging should provide high accuracy solution at low cost. Displays are the main media nowadays for bringing information to people. They range in size from smart watches to smart phones, laptops and tablets all the way to large screen TVs and video walls. We review current technologies and new developments such as quantum dots and micro LEDs as well as some features of 3D displays. In particular, micro LEDs for large size displays require novel assembly technologies to mount chips of only several micro meter in size with extremely high yield at very low cost. The mass transfer of thousands of chips simultaneously is an option to achieve this challenging target.   

Course Outline:

- Fundamental properties of photonic components

- Light sources (LEDs, laser diodes, others)

- Transmitter and receiver components in optical communication (lasers, modulators, photodetectors, passive optical components, photonics integrated circuits PICs, silicon photonics, optical modules), monolithic and hybrid integration, packaging.

- Optical sensing elements and applications (spectrometers, light sources, photoacoustic sensors, frequency combs)

- Display technologies (liquid crystal displays LCD, organic light emitting diode OLED displays, quantum dot emissive layers, micro LED arrays and large size displays using chiplet mass transfer and bonding, 3D displays)

- Summary and outlook

Who Should Attend: The course addresses engineers, scientists and students who would like to get a general overview of various photonics technologies used in todays products and future developments. The aim is to describe which photonic technologies can be used in various applications and what current limitations are and which new technologies are being developed for further improvements or aiming at technology break throughs.

Biography: Dr. Torsten Wipiejewski joined Huawei Technologies in 2014 and is responsible for the European technology sourcing of Huawei’s Hardware Engineering Institute. His interest covers all hardware aspects for products ranging from smart watches to optical communication systems. He has also been appointed as Technical Advisor to the President of Huawei’s European Research Institute. Previously, Torsten was an investor in renewable energy, CEO at Optogan (Germany, Finland) making blue LEDs, and COO at Firecomms (Ireland) making optical transceivers for automotive applications. He also held management positions at ASTRI in Hong Kong, Agility Communications in Santa Barbara, CA, USA as well as Infineon, Osram, and Siemens in Germany. Torsten received a “summa cum laude” Ph.D. degree in electrical engineering from the University of Ulm, Germany and has been an executive member of several international conferences. He was the General Chair of ECTC 2008 and has lectured several courses at conferences and universities. He holds more than 30 patents and has published over 100 scientific papers and presentations.

Course #5: Tutorial for Reliability of Heterogeneous Integration (HI) Systems - Reliability Needs of HI Stakeholders

SB Park, The State University of New York(SUNY) at Binghamton 

Course Objective:

The Heterogeneous Integration Roadmap (HIR) is a roadmap to the future of electronics identifying technology requirements and potential solutions, in a post-Moore world. The primary objective is to stimulate pre-competitive global collaboration between industry, academia and government to accelerate progress. The roadmap offers professionals, industry, academia and research institutes a comprehensive, strategic forecast of technology over the next 15 years. The HIR also delivers a 25-year projection for heterogeneous integration of Emerging Research Devices and Emerging Research Materials with longer research-and-development timelines. The HIR is sponsored by three IEEE Societies (Electronics Packaging Society, Electron Devices Society & Photonics Society) together with SEMI and ASME EPPD.  

This HIR Tutorial will deal with the near-term as well as far-term reliability challenges and needs faced by the six major application segments identified in the HIR Roadmap.  These include: (i) Aerospace and Defense; (ii) Automotive; (iii) High Performance Computing and Data Centers; (iv) Medical, Health and Wearables; (v) Mobile; (Vi) IoT.  The session will also present the phased vision and activities that are being formulated and proposed by the Reliability Technology Working Group in the HIR Team, as the pan-industry global approach needed to meet these reliability needs of the relevant stakeholders.  This vision will be presented in terms of goals and milestones for the short-horizon (1-5 years); mid-horizon (5—10 years) and far-horizon (10-15 years) time-scales.  The purposes for this HIR tutorial are to elicit audience interest, solicit voluntary participation from the community in the HIR activities & to stimulate collaboration among HIR stakeholders around the world.   

Biographies:        

Seungbae (SB) Park is a Professor of Mechanical engineering of the State University of New York at Binghamton. He is also the director of Integrated Electronics Engineering Center (IEEC), a New York State Center for Advanced Technology (CAT). He holds a Ph.D. from Purdue University. Professor Park is an expert in Thermo-Mechanics for electronics components and systems integration. His contributions have been recognized many international awards and citations. He has contributed in various advanced packaging including 2.5D/3D package development, MEMS packaging, reliability assessment of assemblies and systems, and smart electronics manufacturing. He has more than 200 technical publications and holds 4 US patents. Dr. Park is an ASME Fellow, Chair of IEEE Electronic Packaging Society Thermal/Mechanical Technical Committee, Chair of Executive Committee of ASME Electronics and Photonics Packaging Division (EPPD), Past Chair of ASME K-16 Committee on Heat Transfer in Electronic Equipment, and served as an associate editor for ASME Journal of Electronic Packaging. Professor Park has been helping consumer electronics and packaging companies as a consultant.

" Attendees of the PDCs will be offered Continuing Education Units (CEUs) or Professional Development Hours (PDHs), by filling EPTC Survey form on the specific link for each unique PDC (Details to be provided at the end of the PDC). These CEUs and PDHs are recognized by employers as a formal measure of participation and attendance in “noncredit” self-study courses, tutorials, symposia, and workshops."

Course #1: Fan-Out Packaging and Chiplet Heterogeneous Integration

John H Lau, Unimicron Technology Corporation

Course #2: Advanced Packaging for MEMS and Sensors

Horst Theuss, Infineon Technologies

Course #3: Reliability Engineering Testing Methodology and Statistical Knowledge for Qualifications of Consumer and Automotive Electronic Components

Fen Chen , Cruise LLC (a GM company)

Course #4: Photonic Technologies for Communication, Sensing, and Displays

Torsten Wipiejewski, Huawei Technologies

Course #5: Tutorial for Reliability of Heterogeneous Integration (HI) Systems - Reliability Needs of HI Stakeholders

SB Park, The State University of New York(SUNY) at Binghamton